Samsung plans to integrate High NA EUV lithography into high volume DRAM manufacturing by 2028 in an industry first. The chipmaker is joining Taiwan Semiconductor Manufacturing Co. and ASML in a new initiative to replace the 6 inch photomask format with 12 inch masks, targeting a pilot line by 2031 and full advanced node production by 2033.
The move to double the mask size targets the elimination of stitching constraints that currently force the combination of two half fields to create a single die for complex AI chips. TSMC intends to use High NA EUV in high volume manufacturing starting in 2030. This expanded partnership focuses on boosting fab productivity and reducing semiconductor manufacturing costs for the world's two largest chipmakers.
Key sources
- SOURCE@reuters“work with major chipmakers to use latest tools for larger chips”x.com
- SUPPORT@cnbc“TSMC, Samsung commit to ASML’s newest chipmaking tools as AI drives demand”x.com
- SUPPORT@wallstengine“targets a 12-inch mask pilot line by 2031 and advanced-node production using 12-inch High NA EUV by 2033”x.com
- SUPPORT@wallstengine“High-NA EUV in future high-volume DRAM manufacturing by 2028, which the companies say would be an industry first”x.com
- SUPPORT@business“wins commitments from top chipmakers to use its latest semiconductor production gear”x.com
- SUPPORT@financialjuice“Samsung plans to use ASML top tool for DRAM production by 2028”x.com
- SUPPORT@financialjuice“TSMC plans to use ASML top tool for advanced nodes from 2030”x.com
- SUPPORT@ftr_investors“shift from 6-inch to 12-inch photomasks for High NA EUV”x.com