---
format: "aidr-story-markdown/v1"
id: "4fbaa0c2dfc46fbe290fd90299f1cc0d4b9a6b1efb6bd26e6b264a72a113c935"
canonical_url: "https://aidr.today/4fbaa0c2?lang=en"
title: "Xiaomi Xring O100 Hits 1.22 TB/s Bandwidth, First Dedicated Edge AI Accelerator"
lang: "en"
requested_lang: "en"
available_langs: ["en","vi"]
translation_fallback: null
fallback_fields: []
published_at: "2026-08-24T16:52:09.000Z"
category: "Chips"
topics: ["nvidia","inference","chips","infra"]
source_urls: ["https://huggingnews.com/ai/xiaomi-xring-o100-hits-122-tbs-bandwidth-first-dedicated-edge-ai-acceler-d9b6c186","https://x.com/neil_shah/status/2091874398756278472","https://x.com/jiemian_news/status/2091782100978651589","https://x.com/zephyr_z9/status/2091875291891376274","https://x.com/jun_song/status/2091795576384106901","https://x.com/MaxForAI/status/2091805969718415551","https://x.com/teortaxesTex/status/2091794713674186898","https://x.com/TonyJZhou/status/2091847724245151857"]
summary: "Xiaomi's Xring O100 chip uses 3D wafer-on-wafer stacking to enable on-device large language model inference for smartphones, cars, and robots. The 6nm accelerator delivers 1.22 TB/s of near-memory bandwidth, which is 16 times that of a flagship phone's LPDDR5X memory. In lab tests, the hardware processed a 3B parameter model at 330 tokens per second. The chip employs Hybrid Bonding to shrink the bonding pitch from 50 μm to 1.4 μm, creating 2.58 million physical pathways via through-silicon vias. Xiaomi is deploying the O100 in an AI Cube prototype alongside Xring O3 and D100 processors to run models up to 120B parameters at 150W sustained power. The chip has completed silicon validation and is scheduled for commercial use in 2027."
---

# Xiaomi Xring O100 Hits 1\.22 TB/s Bandwidth, First Dedicated Edge AI Accelerator

> [Open the canonical story](<https://aidr.today/4fbaa0c2?lang=en>)

**Published:** 2026-08-24T16:52:09.000Z
**Category:** Chips
**Topics:** nvidia, inference, chips, infra

## Summary

Xiaomi's Xring O100 chip uses 3D wafer\-on\-wafer stacking to enable on\-device large language model inference for smartphones, cars, and robots\. The 6nm accelerator delivers 1\.22 TB/s of near\-memory bandwidth, which is 16 times that of a flagship phone's LPDDR5X memory\. In lab tests, the hardware processed a 3B parameter model at 330 tokens per second\. The chip employs Hybrid Bonding to shrink the bonding pitch from 50 μm to 1\.4 μm, creating 2\.58 million physical pathways via through\-silicon vias\. Xiaomi is deploying the O100 in an AI Cube prototype alongside Xring O3 and D100 processors to run models up to 120B parameters at 150W sustained power\. The chip has completed silicon validation and is scheduled for commercial use in 2027\.

## Sources

- [Story source](<https://huggingnews.com/ai/xiaomi-xring-o100-hits-122-tbs-bandwidth-first-dedicated-edge-ai-acceler-d9b6c186>)
- [Story source](<https://x.com/neil_shah/status/2091874398756278472>)
- [Supporting source](<https://x.com/jiemian_news/status/2091782100978651589>)
- [Supporting source](<https://x.com/zephyr_z9/status/2091875291891376274>)
- [Story source](<https://x.com/jun_song/status/2091795576384106901>)
- [Supporting source](<https://x.com/MaxForAI/status/2091805969718415551>)
- [Supporting source](<https://x.com/teortaxesTex/status/2091794713674186898>)
- [Supporting source](<https://x.com/TonyJZhou/status/2091847724245151857>)