Samsung is transitioning its high-bandwidth memory (HBM) design to a custom base die architecture that integrates memory controllers and compute elements. Roadmap details shared at the Hot Chips conference confirm HBM4E will run at 16 Gbps and introduce zHBM, which reduces power consumption by 70% compared to HBM5. The zHBM configuration stacks the custom base die and memory layers on top of the compute units to improve thermal distribution and utilizes a proprietary die-to-die interface instead of the UCIe standard.
A Samsung executive stated that next generation AI architectures will require increased HBM capacity to meet growing processing demands. The company's move to leading edge nodes for the base die allows for smaller TSV PHY blocks and the integration of real-time telemetry sensors for thermal, voltage, and aging monitoring.
Key sources
- SOURCE@jukan05“HBM4E has been confirmed at 16 Gbps”x.com
- SOURCE@firstadopter“reduce power by 70% versus HBM5”x.com
- SUPPORT@firstadopter“next generation AI architectures will require more HBM capacity”x.com
- SUPPORT@vikramskr“Samsung prefers the use of proprietary D2D, rather than UCIe because they feel UCIe is larger, and not quite energy efficienct”x.com